It's widely known that a transceiver with a high-speed serial interface, e.g., high definition interface (HDMI), display port interface, or universal serial bus (USB) interface, is capable of increasing data transmission rates.
Take HDMI specification for example. A transmitter needs to generate a small voltage swing signal that varies between a high voltage 3.3V and a low voltage 2.8V on a termination resistor of a receiver.
Generally, in order to process data rapidly, control circuits of the transmitter are supplied by a low-voltage (LV) source (e.g., 1.2V or substantially 1.2V) and are operated at a low voltage. In order to generate a high output voltage (e.g., 3.3V or substantially 3.3V) at an output end of the transmitter, a level shifter is provided to convert an LV digital signal to a high-voltage (HV) digital signal, which is then implemented for generating a high output voltage of the transmitter.
FIG. 1 is a schematic diagram of a transmitter and a receiver of the prior art. Resistors Rt1 and Rt2 are termination resistors of a transmitter 100 and resistors Rr1 and Rr2 are termination resistors of a receiver 160—such a structure is a double-terminal architecture for high-speed serial interfaces.
The transmitter 100 comprises an N-to-1 serializer 110 and a pre-driver circuit 120, a current switch 130, a current source Is, and the termination resistors Rt1 and Rt2. The current switch 130 comprises a first transistor M1 and a second transistor M2, which are n-type field effect transistors (FETs).
One end of the termination resistors Rt1 and Rt2 are connected to a high voltage source Vdd1, e.g., 3.3V, and the other end the termination resistors Rt1 and Rt2, nodes d1 and d2 respectively, are regarded as a differential output pair of the transmitter 100. The first transistor M1 and the second transistor M2 have drains respectively connected to the nodes d1 and d2, and sources connected to one end of the current source Is; the other end of the current source Is is connected to the ground. The current source Is provides an appropriate bias voltage to the current switch 130, such that small voltage swing signals of the differential output pair d1 and d2 conform to a predetermined specification.
The N-to-1 serializer 110 receives and converts N parallel bits to a serial signal. The pre-driver circuit 120 receives the serial signal and generates a first control signal and a second control signal to gates of the first transistor M1 and the second transistor M2.
The receiver 160 comprises the termination resistors Rr1 and Rr2. One end of the termination resistors Rr1 and Rr2 are connected to the high voltage source Vdd1, e.g., 3.3V, and the other end of the termination resistors Rr1 and Rr2, nodes d3 and d4 respectively, are regarded as a differential input pair of the receiver 160. The differential output pair d1 and d2 of the transmitter 100 connects to the differential input pair d3 and d4 via transmission lines 150.
When the transmitter 100 is under operation, the N-to-1 serializer 110 receives and converts N bits to a serial signal. The pre-driver circuit 120 receives the serial signal and generates a first control signal and a second control signal for respectively controlling the first transistor M1 and the second transistor M2. Therefore, an output current generated by the differential output pair d1 and d2 flows through the transmission lines 150 and the termination resistors Rr1 and Rr2 of the receiver 160 for generating a voltage difference signal across the differential input pair d3 and d4. The receiver 160 obtains an original serial signal according to the voltage difference signal of the differential input pair d3 and d4.
Since the transmitter 100 needs to output the high voltage of 3.3V, electronic devices of the current switch 130 and the current source Is need to be HV devices. For example, the first transistor M1 and the second transistor M2 need to be HV devices. When the first transistor M1 and the second transistor M2 are HV devices, the gate oxide layers thereof are thicker. However, operation speeds of the HV devices are not fast enough, and accordingly a data transmission rate of the conventional transmission apparatus 100 becomes lower than 1 GHz.
Besides the electronic devices of the current switch 130 and the current source Is, partial electronic devices of the pre-driver circuit 120 need to be HV devices. FIG. 2 is a schematic diagram of the conventional pre-driver circuit 120 comprising a level shifter 121 and four inverters 122 to 128. The level shifter 121 comprises a third transistor M3, a fourth transistor M4, a fifth transistor M5, and a sixth transistor M6. The third transistor M3 and the fourth transistor M4 are n-type FETs, and the fifth transistor M5 and the sixth transistor M6 are p-type FETs.
The fifth transistor M5 and the sixth transistor M6 respectively have sources connected to the HV source Vdd1, and gates connected to a drain of the fifth transistor M5. The sixth transistor M6 has a drain as an output end of the level shifter 121. The third transistor M3 and the fourth transistor M4 have drains respectively connected to the drains of the fifth transistor M5 and the sixth transistor M6, sources connected to ground, and gates serving as two input ends of the level shifter 121.
The first inverter 122, serially connected to the second inverter 124, receives the serial signal and has an output end connected to a gate of the fourth transistor M4. The second inverter 124 has an output end connected to a gate of the third transistor M3. FIG. 2 shows an LV source Vdd2 is a voltage source of the first inverter 122 and the second inverter 124, and electronic devices of the first inverter 122 and the second inverter 124 are LV devices. That is, a digital signal generated by the serial signal, the first inverter 122 and the second inverter 124 has a high level of 1.2V and a low level of 0V.
The level shifter 121 receives the digital signal having the high level of 1.2V and the low level of 0V, and outputs a digital signal having a high level of 3.3V and a low level of 0V. A third inverter 126 serially connected to a fourth inverter 128 is connected to the output end of the level shifter 121. FIG. 2 shows an HV source Vdd1 is a voltage source of the level shifter 121, the third inverter 126 and the fourth inverter 128. Therefore, electronic devices of the level shifter 121, the third inverter 126 and the fourth inverter 128 are HV devices, and each of a second control signal and a first control signal generated by the third inverter 126 and the fourth inverter 128 has a high level of 3.3V and a low level of 0V.
As mentioned above, the conventional transmitter comprises a plurality of HV devices that enlarge layout area as well as hinder promotion of the data transmission rate of the transmitter, so as to jeopardize efficiency of the transmitter.